Speaker
Dr. Leticia M. Bolzani Pöhls
Senior Researcher at IDS
at RWTH Aachen University
Location
IDS (seminar room UMIC-25) and
zoom (contact
Date
Mar. 14th, 2023 at 2pm.
Abstract
Moore’s Law dictated the semiconductor industry evolution for the last 5 decades. Despite all advantages related to CMOS miniaturization, such as the development of high-performance applications, the use of nano-scaled integrated circuits depends on being able to guarantee their reliability during lifetime. Thus, the main goal of this lecture is to introduce the main the fault tolerance approaches proposed in literature to address time-dependent deviations (environmental and temporal variations).
Bio
Throughout her career specific test and reliability regarding integrated system design as well as varying novel technologies have been her focus. She studied in Prof. Matteo Sonza Reorda's CAD Group (Politecnico di Torino, Italy), developing test and fault tolerance strategies for safety-critical applications and concluded her PhD entitled “New Techniques for Highly Reliable Systems-on-Chip (SoCs)†in 2008. She decided to research new low power design strategies during a post-doctoral fellowship with Prof. Enrico Macii's EDA Group (Politecnico di Torino, Italy) and proposed strategies to reduce dynamic and leakage power of integrated circuits, including the development of a Electronic Design Automation (EDA) tool. Back in Brazil her research shifted to Hardware and Software Strategies for the Design of Electromagnetic Interference- and Radiation-Aware Systems-on-Chip (SoCs). From 2010 to 2022 she was associate professor at Pontificial Catholic University of Rio Grande do Sul (PUCRS) and worked on other key subjects related to CMOS technology scaling and to develop new test methodologies for detecting weak resistive-defects in CMOS SRAMs. In 2013 she tackled emerging technologies enabling the further downscaling of integrated circuits and returned to the EDA Group studying graphene-based devices as a post-doctoral fellow. Her broad knowledge, the constant discussion and collaboration with national and international research partners made her focus on the development of test and fault tolerance solutions for nanoscale integrated circuits. Currently she is a senior researcher at IDS (RWTH University, Germany) working on the development of manufacturing test and fault tolerance strategies for memristive device-based systems. Among other activities, she continues to serve as technical committee member in many IEEE-sponsored conferences, such as IEEE DATE, IEEE IOLTS; IEEE ETS, VLSI-Soc. She is member of the IEEE Latin American Test Symposium Steering Committee and of the Biannual European - Latin American Summer School on Design, Test and Reliability (BELAS) Steering Committee as well as Coordinating Editor of Journal of Electronic Testing: Theory and Application.